This controller is intended for data acquisition from IEDs and other low-level devices, protocol conversion, data transfer to SCADA and control centers, interaction with other systems in standard protocols. It is used as a part of: Computerized Process Control System of substations, information acquisition and transmission system, technological information acquisition and transmission system, automated system of electric power technical record-keeping, revenue system and many others.
Intel Atom 1GHz, 1Gb of working memory, SSD with capacity of 8‑64 Gb, VGA 4x Ethernet 10 / 100 / 1000 Base-Tx, 2 x Ethernet 10 / 100 / 1000 Base-Fx (SFP), 1 х RS-232, 1 х RS-485, 1xPPS (in chassis)
Data aquisition protocols from IEDs and other low-level devices:
Protocols of data transmission to the top levels and adjacent systems:
120-370 VDC и 85-265 VAC; (2 power supplies with a possibility of hot swapping)
Operating temperature range:
-40...– +55 °C.
User-defined algorithms (interlocking algorithms) based on FBD:
Example of algorithm realization in ARIS CS controller
ARIS CS has built-in logic development tools. These tools may be used to create logical and calculation diagrams of any difficulty, interlocking, logic processing and user-defined calculation diagrams in particular. User-defined algorithms based on FBD are downloaded into ARIS CS controller as an executable file, at the same time logics of algorithm functioning is not changeable, but internal i/o signals binding can be done. Apart from binding and processing of controller's physical signals it is also possible to process data/signals quality attributes.
Environment for development of user-defined algorithms (interlocking algorithms)
Algorithm development example in Soft Constructor
Delivery package includes advanced FBD development tool - Soft Constructor. Its user interface has a windowbased interface with graphical editor and standard algorithms library. Debugging mode allows to simulate algorithm operation with supervision of variables’ status and execution flow.